ISO/IEC INTERNATIONAL STANDARD 15776 First edition 2001-12 VME64bus - Specification LSo Reference number ISO/EC 15776:2001(E) Copvriaht International Oraanization for Standardizatior ISO/IEC INTERNATIONAL STANDARD 15776 First edition 2001-12 VME64bus - Specification ISO/IEC2001 All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by any PRICECODE XF IEC OS1 For price, see current catalogue - 2 - 15776 @ISO/IEC:2001(E) CONTENTS FOREWORD INTRODUCTION 9 General .13 1.1 Scope and object .13 1.2 Normative references 1.3 VMEbus interface system elements.. 1.4 VMEbus specification diagrams 1.5 Specification terminology 1.6 Protocol specification 1.7 System examples and explanations. 2 Data transfer bus 2.1 Introduction .25 2.2 Data-transfer-bus lines. .27 2.3 DTB modules - Basic description . .38 2.4 Typical operation.. .64 2.5 Data-transfer-bus acquisition . .73 2.6 DTB timing rules and observations .75 3 Data transfer bus arbitration .... .120 3.1 Bus arbitration philosophy.. .120 3.2 Arbitration bus lines.. .122 3.3 Functional modules .. .124 3.4 Typical operation ... .132 3.5 Race conditions between master requests and arbiter grants. .141 4 Priority interrupt bus... .141 4.1 Introduction... .141 4.2 Priority interrupt bus lines.... .144 4.3 Priority interrupt bus modules - Basic description ..... .146 4.4 Typical operation ... .159 4.5 Race conditions.... .165 4.6 Priority interrupt bus timing rules and observations .... .166 5 Utility bus .. .183 5.1 Introduction.. ..183 5.2 Utility bus signal lines. .183 5.3 Utility bus modules . .183 5.4 System initialization and diagnostics. ..186 5.5 Power and ground pins. .190 5.6 Reserved line 191 5.7 Auto slot ID. .191 5.8 Auto system controller. .198 Electrical specifications 199 6 6.1 Introduction..... .199 6.2 Power distribution 6.3 Electrical signal characteristics 6.4 Bus driving and receiving requirements . ...202 - 3 - 15776@ISO/IEC:2001(E) 6.5 Backplane signal line interconnections .. .206 6.6 User defined signals... .210 6.7 Signal line drivers and terminations . .210 Mechanical specifications... 212 7.1 Introduction. .212 7.2 VMEbus boards .213 7.3 Front panels ...217 7.4 Backplanes ...220 7.5 Assembly of VMEbus subracks. ...222 7.6 Conduction cooled VMEbus systems. ...223 7.7 VMEbus backplane connectors and VMEbus board connectors. ...223 Annex A (normative) Glossary of VMEbus terms .. .245 Annex B (normative) VMEbus Connector/Pin description ..251 Annex C (normative) Manufacturer's board identification. .255 Rule index .257 Figure 1 - System elements .15 Figure 2 - Functional modules and buses .21 Figure 3 - Signal timing notation ..... ..25 Figure 4 - Data transfer bus functional block diagram. Figure 5 - Block diagram - Master... Figure 6 - Block diagram - Slave.. ..41 Figure 7 - Block diagram - Bus timer ...43 Figure 8 - Block diagram - Location monitor .44 Figure 9 - Four ways in which 32 bits of data might be stored in memory... ..53 Figure 10 - Four ways in which 16 bits of data might be stored in memory.. Figure 11 - Block diagram - Configuration ROM / Control & Status registers. ..59 Figure 12 - Example of a non-multiplexed address, single-byte read cycle . ..66 Figure 13 - Example of multiplexed address double-byte write cycle.. Figure 14 - Example of non-multiplexed address quad-byte write cycle... ..69 Figure 15 - Example of an eight-byte block read cycle . Figure 16 - Data transfer bus master exchange sequence ... ..74 Figure 17 - Address broadcast timing - All cycles.. .94 Figure 18 - A16, A24, A32 master, responding slave, and location monitor. ...95 Figure 19 - Master, slave, and location monitor - A16, A24 and A32 address broadcast timing .....96 Figure 20 - Master, slave, and location monitor A16, A24, and A32 address broadcast timing ....7 Figure 21 - Master, slave and location monitor - A64, A40, and ADOH address broadcast timing ... ..98 Figure 22 - Master, slave, and location monitor